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FPGA based Dynamic Thresholding Circuit

by박진희 2012.01.18 20:32
저자 J. U. Cho, S. H. Lee, J. W. Jeon, J. T. Kim, J. D. Cho, K. M. Lee, J. H. Lee 
학회명 International Conference on Computational Science and Its Applications 
학회명 (약자) ICCAS 2004 
pp. 1235-1238 
학회시작일 2004-08-25 
학회종료일 2004-08-27 
비고  
Thresholding has been used to reduce the number of gray values in images. Typically, a single threshold value has been used, resulting in two gray level images. Image reduction of one single threshold value, however, may lose too much of the high-frequency edge information. Thus, dynamic thresholding that uses a different threshold for each pixel is preferred instead of using a single threshold value. Dynamic thresholding can preserve high frequency details as well as reduce the size of images. Since it takes long time to perform existing software dynamic thresholding in an embedded system, this paper proposes and implements a circuit by using FPGA in order to perform a real-time dynamic thresholding. The proposed circuit consists of two counters, and threshold look-up table, and control unit. The values of two counters determine each pixel position, the threshold look-up table converts each pixel value into other value, and the control unit generates necessary control signals. On arriving from a camera to the proposed circuit, each pixel is compared with its threshold value and is converted into other gray value. An image processing system by using the proposed circuit will be implemented and some experiments will be performed.
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